逻辑器件/收发器/编码器

Octal Edge-Triggered D-Type Flip-Flops with 3-State Outputs 20-PDIP -40 to 85

The MM74HC273 edge-triggered flip-flop utilizes an advanced silicon-gate CMOS process to implement a D-type flip-flop. They feature high noise immunity, low power consumption and higher speed compared to low power Schottky TTL circuits. The device contains 8 master-slave flip-flops with common clock and common clear. Data on the D input that meets setup and hold time requirements is transferred to the Q output on a low-to-high transition of the clock input. Clearing the input low sets all outputs to the low state. Each output is capable of driving a load equivalent to 10 low-power Schottky TTLs. The MM74HC273 is functionally compatible with the 74LS273. Protect all inputs from electrostatic discharge damage by diode-connecting VCC and ground.

The MM74HC273 edge-triggered flip-flop utilizes an advanced silicon-gate CMOS process to implement a D-type flip-flop. They feature high noise immunity, low power consumption and higher speed compared to low power Schottky TTL circuits. The device contains 8 master-slave flip-flops with common clock and common clear. Data on the D input that meets setup and hold time requirements is transferred to the Q output on a low-to-high transition of the clock input. Clearing the input low sets all outputs to the low state. Each output is capable of driving a load equivalent to 10 low-power Schottky TTLs. The MM74HC273 is functionally compatible with the 74LS273. Protect all inputs from electrostatic discharge damage by diode-connecting VCC and ground.

Belonging Series of Logic Circuit: 74HC Function: Master Reset Type: D-Type Output Type: Non-inverting Clock Frequency: 122MHz Maximum Propagation Delay at Different V, Maximum CL: 26ns@6V, 50pF Flip-Flop Type: Positive Edge Voltage- Power supply: 2V~6V Quiescent current (Iq): 8uA Input capacitance: 3.5pF Low-level output current (IOL): 5.2mA High-level output current (IOH): 5.2mA

CD74HC74 High-Speed ​​CMOS Logic Dual Rising-Edge D-Type Flip-Flop with Set and Reset

The high-performance silicon-gate CMOS MC74HC574A has the same pin-out as the LS574. The device inputs are compatible with standard CMOS outputs; pull-up resistors are included for compatibility with LSTTL outputs. Data that meets the setup time requirements is clocked to the output with the rising edge of the clock. The output-enable input does not affect the state of the flip-flops, but all device outputs are forced to a high-impedance state when output-enable is high. Therefore, data can be stored even if the output is not enabled. The HC574A has the same functionality as the HCT374A, but has a trigger input on the opposite side of the encapsulation output, simplifying PC motherboard layout.