The high-performance silicon-gate CMOS MC74HC393A has the same pin-out as the LS393. The device inputs are compatible with standard CMOS outputs; pull-up resistors are included for compatibility with LSTTL outputs. The device consists of two independent 4-bit binary ripple counters with parallel outputs from each counter stage. A divide-by-256 counter can be implemented by cascading two binary counters. The internal flip-flop is triggered by a high-to-low transition of the clock input. Counter reset is asynchronous and active high. Due to internal ripple delays, the state changes of the Q outputs do not occur simultaneously. Therefore, the decoded output signal will experience decode spikes and should not be used as a clock or polarity, except when using the HC393A's clock gating.
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